High-speed cosine generator

An 8-bit high-speed cosine generator circuit was designed and simulated. Speed and area estimates were made for 16-, 24-, 32-, 40-, 48-, 56-, and 64-bit designs. The basis of the cosine generator design is stages of a half-angle cosine function preceded by a low order Taylor series approximation of cos (/spl theta//2/sup N/). This turns out to be a decent approximation. The big difference between this and most other methods is that a lookup ROM for the first order approximations is avoided.<>