High Throughput Diagnosis via Compression of Failure Data in Embedded Memory BIST

The paper presents a BIST-based fault diagnosis scheme that can be used to identify a variety of failures in embedded memory arrays. The proposed solution employs flexible test logic to record test responses at the system speed with no interruptions of a BIST session. It offers a simple test flow and enables detection of time-related faults. Furthermore, the way the test responses are processed allows accurate reconstruction of error bitmaps.