Hardware implementation of a 802.11n MIMO OFDM transceiver

Wireless communication systems have become more and more widespread in the recent years. One of the most important standards is the Wireless LAN standard. This standard has three different amendments a, b and g. The next Wireless LAN standard which is not finalized yet is the 802.11n standard. The new standard is predicted to be capable of supporting data rates up to 600 Mbps thanks to deploying the new communication method ldquoMIMOrdquo. However, the data rate can only be achieved if it is efficiently realized in real hardware design. In this paper a 802.11n transceiver is designed and simulated. First, a high level Simulink model based on current draft of the standard is designed and tested. Design alternatives for mapper, viterbi decoder and MIMO equalizer are investigated towards an optimum design. Next, a fixed-point model is obtained and simulated. Optimizations have lead to higher power and area efficiency. Finally a FPGA-based design is proposed according to the results gained in the previous sections.