Single-phase boost PFC voltage-doubler self-controlled using FPGA

This paper presents a strategy for controlling the input current and output voltages of a single-phase boost PFC (power factor corrector) voltage-doubler, implemented using FPGA. A sample of the input voltage is not necessary, since it is naturally used as reference for the input current, by a natural feedback through the power circuit. This way, the model is more accurate, presenting fewer simplifications and taking better advantage of the natural characteristics of the converter, when compared to classic control, with better results, and many advantages, by simply using a proportional compensator. It also presents superb characteristics for the output voltages control, again with a natural feedback for the total output voltage and even for the voltage balancing, although it's yet necessary an integrator for the total output voltage loop, in order to guarantee the zero steady state error. Despite the hyperbolic characteristic for the voltage model could be a problem, in fact it is very simple to treat, providing yet good characteristics, like the possibility to operate almost without load with a good voltage regulation. Some of the advantages of this strategy include greater robustness and simplicity, emphasizing the output voltage balancing natural feedback, less susceptibility to noise and a smoother turn-on characteristic. The FPGA used in the project is an ALTERAreg Cyclone II EP2C35F672C6, presented on the kit DE2, which is a low-cost FPGA with low-consumption at a great speed.