Lossless memory reduction and efficient frame storage architecture for HDTV video decoder

A novel lossless frame recompression method and an efficient memory address mapping scheme for frame storage are proposed, which can reduce the Read/Write and row activation operations of the external memory. The proposed scheme has been verified with MPEG-2 based HDTV video decoder. Without video quality degradation and the increasing of reading bytes from off-chip memory, the number of bytes writing to the memory is reduced about 50% in comparison to the conventional decoder. By storing the luma and chroma components of the same macroblock in one row of different banks, as well as the ten neighboring macroblocks, the logic row change amount can be cut down to near 5% of the conventional scheme.