Pre-silicon SPICE modeling of nano-scaled SOI MOSFETs

Problems of pre-silicon compact modeling of nano-scaled silicon-on-insulator MOSFETs are addressed using the extraction of SPICE model parameters directly from numerical TCAD simulations. Although there are difficulties in the parameter extraction for the standard SPICE compact models we show by a direct comparison with the results of the numerical mixed-mode TCAD simulations that with some trade-offs in accuracy of static device characteristics reasonably accurate transient SPICE simulations are possible for such transistors.