Simulation of self-heating effects in 30nm gate length FinFET

This paper presents a detailed thermal analysis of nanoscale FinFET devices. A three-dimensional electro-thermal device simulator, calibrated against Monte Carlo simulations at various temperatures, is adopted in order to study self-heating effects in Fin-FETs, and their dependence on geometrical parameters such as buried oxide thickness, source/drain extension length, fin-pitch and fin height.