Simulation of migration effects in PoP

Due to miniaturisation, higher performance and higher integration, the width of conductive lines as well as the diameter of the solder joints decreases; 3-dimensional packaging like “Package-on-Package” (PoP) is used in compact applications. The density of solder bumps increases, while pitches become finer. This may lead to an increase of the current density in the solder bump. At present for these packages only Finite-Element-simulations concerning the warpage were carried out. For the characterisation of PoP reliability, the migration behaviour of the bumps as well as the traces in the substrate were investigated by finite element simulations. The purpose of this paper is an investigation of the via fill in, ambient temperature, reference temperature of the stress free state as well as the influence of delamination in the interconnections of the PoPs before degradation out of migration effects occur, to find out possible risk for PoPs with smaller bumps and traces.