CMOS Differential Structure with Improved Linearity and Increased Frequency Response

An original differential structure using exclusively MOS devices working in the saturation region will be further presented. Performing the great advantage of an excellent linearity, obtained by a proper biasing of the differential core (using original translation and arithmetical mean blocks), the proposed circuit is designed for low-voltage low- power operation. The estimated linearity is obtained for an extended range of the differential input voltage and in the worst case of considering second-order effects that affect MOS transistors operation. The frequency response of the new differential structure is strongly increased by operating all MOS devices in the saturation region. The circuit is implemented in 0.35 μm CMOS technology, SPICE simulations confirming the theoretical estimated results.