RLC Crosstalk Calculation with Dissymmetrical Attacks

The signal integrity of VLSI circuits is an emerging concern in high performance integrated circuits. A previous RLC crosstalk noise expression we have submitted, based on a RLC transmission line model associated with each propagation mode, could predict the noise amplitude of an RLC interconnect, yet only by making the assumption of a perfect symmetry between the two coupled lines and their respective attacks and loads. To be able to use this expression in VLSI circuits, where active and victim lines are attacked by buffers with different equivalent output resistances, this paper proposes to determine a corrective term depending on the line electrical parameters and on a dissymmetry factor between the equivalent resistances attacking the coupled lines.