Analysis of Open Loop Track-and-Hold Circuits

This paper analyzes and compares two open-loop track-and-hold architectures, both of which can be used as frontend sampling circuits for high-speed analog-to-digital converters. The first architecture is based on a source-follower, the second on a differential pair. Both theoretical analyses and simulation results are used to compare the alternatives with respect to speed, power consumption, accuracy, mismatch sensitivity, power supply requirements, technology portability, flexibility and controllability. Finally, two transistor-level designs in a CMOS 0.18 μm technology achieving 10 bit accuracy while operating at 500 MSPS will be presented.