Towards the High-Level Design of Optical Networks-on-Chip. Formalization of Opto-Electrical Interfaces

In the near future, heterogeneous systems-on-chip (SoC) will become the main thrust driving the evolution of integrated circuits (IC). Thanks to the benefits that they will bring (e.g. less area, elimination of inter-chip communications, which can cause transmission delays, data corruption, and interference), the entrance of multi-technologies systems on chip in IC community is expected with optimism. However, their design is still a challenge and more work is required at the technological, architectural and system level; a key issue is the design and verification of multi-domain interfaces. This paper presents a first step towards the automatic generation of opto-elctrical interfaces, the high-level formalization of the architecture and the functionality of these interfaces.