Thermal Test Chip Design and Performance Considerations

Increasing device complexity, greater power densities, ever changing packages, and shorter time-to-market deadlines have combined to make thermal characterization efforts more frenzied than ever. A thermal test chip was designed to assist the thermal engineer in answering critical thermal packaging or material questions. It has a standard heat source with integrated temperature sensors in a format that can handle both wire bond and bump chip configurations in a scaleable array size. This allows a single wafer to supply various array sizes to meet changing requirements. The key requirements for a thermal test chip are: • Maximum possible heating area relative to chip size • Uniform temperature profile across heating area • Low temperature coefficient for heating source • Temperature sensor in center of chip • Simple-to-use temperature sensor(s) • Multiple temperature sensors for a temperature profile across chip surface • Kelvin Connections (i.e., 4-wire connections) for improved measurement accuracy • Chip size that closely approximates the chip being simulated. This paper will describe a thermal test chip that meets these requirements in the simplest manner possible. Insight into future investigations will also be presented.