A low-power 10-Gb/s 0.13-μm CMOS transmitter for OC-192/STM-64 applications

This paper presents a low-power 10-Gb/s transmitter for SONET OC-192/SDH STM-64 applications. The transmitter comprises a 16-bit LVDS interface, a FIFO, a clock multiplying unit (CMU), a 16:1 multiplexer (MUX), and a CML output driver. The total output jitter of the transmitted STM-64 frame data is 0.12 UIpp (unit-interval, peak-to-peak) over 20-kHz to 80-MHz bandwidth and 0.035 UIpp over 4-MHz to 80-MHz bandwidth, both of which are way below the corresponding SDH jitter generation specifications, 0.3 UIpp and 0.1 UIpp, respectively. The serial output waveform complies with the OC-192/STM-64 eye mask. With low power design, the transmitter fabricated in 0.13-μm mixed-signal CMOS process consumes only 190 mW from 1.5/2.5-V supplies. The 2.5 × 2.5 mm² die was packaged in an 8 × 8 mm² 128-ball CABGA.