Synthesis of physically heterogeneous systems on chip

In this paper, we describe design technology issues and motivations involved with physically heterogeneous systems on chip. A Petri-net style approach is used to visualize possible design process routes through abstraction levels and structural decomposition, from system-level specifications to physical design. Transitions between nodes are based on an iterative design process and design information formalization (AMS IP). This method has been implemented and used to explore tradeoffs between photonic and electronic components.