Improved low voltage all cascode mirror current source using the DC level shifter

This paper presents the implementation of the so-called “DC level shifter” to obtain a low voltage, high bandwidth (200 MHz), high output resistance (11GΩ), low input resistance (0.005Ω) and low settling time (24 nSec.) cascode current mirror. The characteristics of the proposed circuit was compared with the floating gate transistor technique numerically. The simulation results in 0.5um CMOS technology indicates the superiority of the proposed method than the floating gate technology.