A novel 8T SRAM cell with improved read-SNM

As the MOSFET's channel length is scaling down, SRAM stability becomes the major concern for future technology. The cell becomes more susceptible to both process induced variation in device geometry and threshold voltage variability due to dopant fluctuation in the channel region. In this paper, a novel highly stable 8T SRAM cell is proposed which eliminate any noise induction during read operation and keep the read SNM as high as 468 mV at V_DD = 1.2 V in 120 nm technology. The cell also supports low power operation at cell V_DD as low as 0.34 V.This new asymmetric cell structure is capable of using differential sense technique for high speed read operation.