Submicron Gap Planarization with Photo CVD and Spin-on-Glass Multi-Layers for Multi-Level Interconnections

For multi-level interconnections in submicron design ruled VLSIs, burying a dielectric interlayer in submicron gaps between metal lines is becoming a key technique. Photo CVD is expected for burying technology because of its good step coverage l),2) and no damage deposition in comparison with conventional RF bias sputtering. There have been no reports on applications of photo CVD for burying submicron gaps. This paper describes;