Asymmetric pulse width modulated envelope signal in an EER architecture for WLAN

The objective of this paper is to provide the circuit designer with the tolerated pulse asymmetry of an envelope path signal amplification chain. The application is an enhanced Envelope Elimination and Restoration transmitter architecture for IEEE 802.11a. A general time-domain model is constructed and utilized to identify the impact on the overall system performance. It is found that a larger rise than fall time can be beneficial, because of the reduction of the DC offset. Three ideas to utilize the phenomenon are demonstrated, with improvements of 3 dB to the critical linearity requirement (knee of the WLAN mask).