Standard Interfaces for FPGA Components

In response to myriad of communication standards currently available, radio designers are architecting software defined radio (SDR) systems that have the ability to support any present and future waveform specifications. Such systems facilitate the integration of new waveform components by offering standardized interfaces to which waveform components connect. These standardized interfaces provide a mechanism through which any waveform component can be inserted into any radio so long as the same standard interface is supported at the point of connection The Software Communications Architecture (SCA) specifies standard interfaces for the interconnection and control of waveform components executing within a SDR. While the model set forth by the SCA works well for devices such as general-purpose processors (GPPs), it can be terribly inefficient for specialized hardware devices such as digital signal processors (DSPs) and field programmable gate arrays (FPGAs). As a result of the SCA failing to address the concerns surrounding the use of FPGAs in SCA-compliant systems, many designers have been forced into architecting their own solutions. A common thread in many of these solutions is the use of on-chip interfaces, such as the Open Core Protocol (OCP). This paper highlights several of the benefits that accompany the use of OCP as the mechanism that enables FPGA-based waveform component to interact in a standard and well-defined manner. This benefit includes the decoupling of component and container design, increased reliability and portability, faster time to market and better verification.