Power amplifiers in 0.13 μm CMOS for DECT: a comparison between two different architectures

Two 1.9 GHz power amplifiers (PAs) have been designed and fabricated in a 0.13 μm standard CMOS process. They are both two-stage push-pull amplifiers with more than 27dBm output power. The amplifier stages of both PAs have exactly the same transistor structures and sizes, but the input and interstage matching networks are realized differently. The first PA uses on-chip transformers for the coupling of the stages, the second PA LC matching networks. In this paper both topologies are compared and benefits and drawbacks of the different structures are discussed.