A VQ Algorithm Based on Novel Codebook and VLSI Architecture

A vector quantization (VQ) algorithm based on rotating compressed codebook is proposed. Compare with the typical vector quantization algorithm, the algorithm decreases 75% memory size and 75% input codebook bandwidth. The VLSI architecture for the algorithm was designed, and parallel pipeline was employed in the critical unit. The architecture was verified in FPGA, operation rate of the whole system can achieve 87.35 MHz. It can support real time application of 512times512 at 30 fps when the operation rate is 55 MHz.