On the use of time-varying delay to represent sample-and-hold circuits

This paper revises the so-called input delay approach to the control of sampled-data systems with nonuniform sampling, in which the sample-and-hold circuit is embedded into an analog system with a time-varying input delay. It is shown that the conservatism in calculating the maximal admissible sampling period is reduced by about 57% if the time-varying delay embedding step is omitted.