Hardware architecture for optical packet and burst switching applications

This paper describes an innovative packet- switched network architecture hardware prototype, designed and implemented for a proof-of-concept of high-speed optical burst and packet switching applications. Commercially available ASICs and high-density programmable logic devices, with functional blocks implemented in VHDL, were used in the custom-designed boards, built to validate the functionalities of a 3-node network architecture. Computer simulations were also included to verify the network behavior in different traffic scenarios.