Impact of laterally asymmetric channel and gate stack architecture on device performance of surrounding gate MOSFET (LACGAS SGT): A simulation study

In the present work, LACGAS SGT that integrates the advantages of both the LAC and stack architecture is proposed and its impact on device characteristics is studied using numerical simulations. Using numerical simulations, the novel features of LACGAS SGT have been studied and compared with CON and LAC devices and it has been shown that LACGAS design leads to enhanced device performance in comparison to CON and LAC devices.