A Novel Double-Sampling Sigma-Delta Modulator Architecture for Broadband Applications

In this paper, a novel single-loop high-order multi-bit sigma-delta modulator (SDM) architecture is proposed for broadband applications. This architecture employs the technique of double-sampling to double the sampling frequency of the SDM without increasing the clock frequency. To reduce the noise folded into the signal band in a double-sampling SDM, an additional zero is placed at the half of the sampling frequency (fs/2) of the modulator's noise transfer function (NTF). A new simple circuit to realize the zero at f_s/2 is proposed. Compared with architectures presented in other papers, the proposed SDM architecture has enough flexibility to implement the optimized NTF of the modulator. Furthermore, to relax the requirements of opamp, a unity-gain signal transfer function (STF) is used.