A 12-GS/s Phase-Calibrated CMOS Digital-to-Analog Converter

A 12-GS/s 8-bit Digital-to-Analog Converter (DAC) enables 24 Gb/s signaling over conventional backplane channels. Designed in a 90-nm CMOS process, the circuit occupies an area of 670μm×350μm and achieves INL and DNL of 0.31 and 0.28 LSB. Measured SNDR and SFDR are 41 dB and 51 dB at 750 MHz and 32.5dB and 35dB at 1.5GHz. The power dissipation is 190 mW from 1-V and 1.8-V power supplies.