Delta-Sigma ADC for Ternary Code System (Part I: Modulator Realization)

The paper presents realization of the delta-sigma modulator of analog-to-digital converter (ADC) for ternary code signal processing. The modulator corresponds to the second order structure which was simulated on the circuit level. The evaluation demonstrates following characteristics of the modulator: frequency range is about 1 MHz, signal-to-noise ratio (SNR) is 60 dB, and power consumption is about 20 mW.