70-GHz Effective Sampling Time-Base On-Chip Oscilloscope in CMOS

This paper examines a time-base measurement system for on-chip digitization. Undersampling, combined with single-path time-domain amplification and processing, is used to perform the embedded measurement in a time-efficient manner. The proposed system relies on simple circuit components while performing high-speed measurements. Additionally, ease of calibration with minimal silicon area overhead renders the system attractive from a design-for-test perspective. The circuit was implemented in a 0.18-mum standard digital CMOS process using a single 1.8-V supply. On-chip interconnect crosstalk generation with variable strength is included on chip for characterization, and successfully measured using the prototype chip. An effective 70-GHz sampling rate is experimentally obtained from the implemented on-chip oscilloscope, with a voltage resolution of 4 mV. The estimated static power dissipation is ~3.5 mW, with a total active area of 0.45 mm
²
taken up by the associated test and calibration vehicles.