A Differential Approach to Analog Viterbi Decoding

In this paper we present a differential approach to analog current-mode Viterbi decoding. Such an approach is suited for current and future communication systems which take advantage of analog processing together with conventional digital logic. With the increased data rates, the elimination of the high-speed and power consuming A/D-converter has made an analog Viterbi decoder a promising alternative compared with its digital counterparts. The novel differential structure enables path memory management to be excluded from the implementation. In the proposed design decoding is performed after seven consecutive stages, which results in a high speed and savings in power consumption and silicon area. An example decoder was implemented for a (2,1,7) convolutional code having coding rate of ½ and constraint length of 7.