Area-Power Efficient Lifting-Based DWT Hardware for Implantable Neuroprosthetics

Discrete wavelet transform (DWT) has been shown to provide exceptionally efficient data compression for neural records. This paper describes an area-power minimized hardware implementation of the lifting scheme for multi-level, multi-channel DWT. Performance tradeoffs and key design decisions for implantable neuroprosthetics are analyzed. A 32-channel, 4-level version of the circuit has been custom designed in 0.18μm CMOS and occupies only 0.16mm².