A DEM Scheme for I/Q Mismatch Compensation in Multi-Bit CT ΔΣ Modulator

A new dynamic element matching (DEM) technique is proposed to reduce the combined problem of non-linearity within the multi-bit digital-to-analog converters (DAC) and I/Q mismatches in the feedback paths of quadrature delta-sigma (ΔΣ) modulators. Under this scheme, the non-linearity effect of I and Q DACs is suppressed by data-weighted averaging (DWA) individually. At the same time, the two DACs are swapped according to the element selection pointers of DWA. Consequently, the image is restrained by this time-interleaved swapping. The overhead of this scheme is minimal. Extensive MATLAB simulations were performed to evaluate the performance of this scheme. With a 3rd order, 64 oversampling ratio quadrature delta-sigma modulator, this scheme shows 10dB and 25dB improvement in signal-to-noise-plus-distortion ratio (SNDR) and image rejection ratio (IRR) respectively for the case of 2-bit ΔΣ modulator.