Design of Multilevel Radar Target Simulator

Radar target simulators form an essential requirement in the defense industry for electronic countermeasure and performance evaluation of radars. In this paper we present an field programmable gate array (FPGA) based design of a generic multilevel radar target simulator capable of simulating target echo at video, intermediate frequency (IF) and radio frequency (RF) levels in Synthesis or Digital Radio Frequency Memory (DRFM) modes of operation. Both modes of operation are capable of simulating target echoes with range, doppler and Radar Crosection (RCS) effects in real time. The methodology used in the design of Synthesis mode of operation involves the regeneration of the stored modulated waveform codes of transmitted radar pulses by adding necessary delay, doppler and RCS effects in real time. The design follows a systematic approach starting with Trajectory generation followed by Radar waveform code samples generation(offline), Delay and radial velocity computation (offline),attenuation value computation (offline) to simulate RCS, Noise generation (offline), Synchronization with respect to Radar transmit pulses, Identification of the radar transmit pulse characteristics, Retrieval of corresponding waveform samples with desired range, doppler, noise effects and finally the conversion to the DAC input format. Thus generated IF level signal is further up converted to RF. But in the DRFM mode of operation, down converted RF signal is sampled and delay, doppler and noise effect are added. The selection of the mode of operation is done through a Graphical User Interface (GUI). The paper elaborates the methodology used and highlights the efficiency of the design with supporting results.