A VLSI Algorithm for Integer Square-Rooting

A VLSI algorithm for integer square-rooting is proposed. It is based on the radix-2 non-restoring square-rooting algorithm. Fast computation is achieved by the use of the radix-2 signed-digit representation. Nonetheless, the algorithm does not require normalization of the operand. Combinational (unfolded) implementation of the algorithm yields a regularly structured array square-rooter. Its delay is proportional to n, the bit length of the operand, while that of conventional ones is at least proportional to n log n.