Implementation of the Modified State Mapping Viterbi Decoder with Radix-4

In this paper, the complexity of Viterbi architectures is compared in the point of the survivor sequence management. Moreover, the Viterbi decoder with constraint length (K=7), truncation length (T=5K), and code rate (R=l/3) is implemented. The Viterbi decoder uses the Radix-4 as the ACS method to obtain high throughput and low latency. The modified state mapping algorithm is also applied to achieve low latency as the survivor sequence management.