Implementation of the recursive QR algorithrm on a 2 × 2 CORDIC testboard: a case study for radar applications

Though the recursive QR algorithm - particularly the time-adaptive version of it - is seemingly simple and easy to implerment, it frequently shows up in applications where the required throughput is so high that only specific implementations can achieve sufficiently high update rates. An elegant example of such a specific implementation is presented here in the form of a prototype. It is a processor which essentially performs complex vector rotatioins in 2-dimensional planes. This operation is realized in CORDIC arithmetic and three pipeline CORDIC cores sustain a throughput rate as high as the pipeline clock rate. The prototype presented here is a board level implementation built around four pipeline (CORDIC chips. A single chip version could be easily designed. In radar applications, update rates in the MHz range for then-antenna arrays can be obtained with only one such single chip processor.