An Input Driver Circuit for Class F Power Amplifier

An input driver circuit for driving a cascode stage Class F RF Power Amplifier in deep submicron CMOS technology is proposed. The input driver circuit will deliver an improvement to the RF Power Amplifier's efficiency by reducing drain current distortion and provide better breakdown voltage protection for the transistor. The proposed input driver and Class F Power Amplifier are designed using Silterra RF CMOS 0.18μm technology and simulated using Hspice.