Nonlinear Approach for the Optimization of a DRO at 10.4GHz

This paper describes the design of a 10.4 GHz dielectric resonator stabilized oscillator. The DRO was designed using linear theory and then optimized for power and noise using nonlinear theory based upon the transistor's small signal S-parameters at the operating point, its DC-characteristic, and its noise parameters. The oscillator was fabricated in microstrip technology on a PTFE substrate. The packaged NEC N71083 GaAs MESFET was used. An output power of 14.1 dBm, and a phase noise of -92 dBc/Hz at 10 kHz offset were achieved.