A Nonlinear Electronic Equalizer Implemented in InGaP/GaAs HBT Technology for Dispersion Compensation of Gigabit Optical Fiber Links

This work describes a high-speed nonlinear fiber dispersion equalizer circuit implemented in InGaP/GaAs HBT technology. The equalizer IC consists of 3 independent and bypass-able 2-bit analog to digital converters and a 64-bit programmable look up table memory. The equalizer acts as a fully programmable pattern recognition circuit, designed to compensate serial links with data rates of above 5 Gigabits per second. Demultiplexing and parallel processing at low data rates is avoided as the LUT memory based architecture enables the circuit to directly process data at the incoming bit rate. Performance is evaluated with pattern tests in read mode up to 5GHz. This is very close to the maximum flip-flop clocking rate for the technology employed