A Current-mode CMOS Sample-and-Hold Circuit for ADC

This paper presents a current-mode sample-and-hold circuit using 0.5 mum CMOS technology. The input signal is sampled using a current subtracter and a half wave rectifier instead of a sampling switch used in the conventional sample-and-hold circuit. As a result, the switch feedthrough error is eliminated. The proposed circuit achieves high sampling frequency up to 100 MHz and high accuracy. The performances of the proposed circuit are demonstrated by PSPICE simulation results