A highly portable, self-stimulating and self-testing reliability test chip for ASIC products

The use of a highly portable ASIC design, a reliability test chip (RTC), that has been successfully used for the reliability assessment of two generations of CMOS products is described. The RTC design has many features that make it an excellent vehicle for performing silicon process and package reliability qualifications. This design comprises a repetitive megacell-based core that is supported by a standardized vector generator and verification circuitry. The standardization of the design allows easy portability to various base array sizes and new silicon process technologies.<>