On-Board Encryption in Earth Observation Small Satellites

As satellite imaging payloads are providing more and more valuable and sensitive data the threat of unauthorized access to this data is also increasing. Therefore the demand to protect the data transmitted from satellites to ground is increasing and hence the need to use encryption on-board. The advanced encryption standard, which is a very popular choice in terrestrial communications, is slowly emerging as the preferred option in the aerospace industry including satellites. Satellites operate in harsh radiation environment and therefore any electronic systems used onboard satellites such as processors, memories etc. are very susceptible to faults induced by radiation. So the encryption processor should be robust enough to faults in order to avoid corruption of valuable data and subsequent transmission to ground. This paper presents a novel model to detect and correct single event upsets in on-board implementations of the AES algorithm, which is based on Hamming error correcting code. An FPGA implementation of the proposed model is carried out and measurements of the power and throughput overhead are presented