An Adaptive Dynamic Arbiter for Multi-Processor SoC

As technology scales towards deep submicron, the integration of more than one processor on a chip is becoming possible. The communication architecture is becoming the bottleneck for multi-processor SoC, and efficient arbiter is able to solve the contentions due to simultaneous request accesses in shared bus systems to prevent system performance degradation. This paper presents a simple adaptive dynamic arbiter that can adjust the bandwidth proportion assigned to every processor automatically to avoid starvation problem in multi-processor SoC environment. The simulation results show that the proposed one could reduce 68% task execution time, decrease the bus request latency of a processor by 78% and provide better control of the communication bandwidth allocated to individual processor than convention arbiters