On-Chip ESD Protection Strategies for RF Circuits in CMOS Technology

Electrostatic discharge (ESD) protection design for RF circuits has been one of the key challenges to implement RF ICs in CMOS technology. On-chip ESD protection circuit at the RF I/O pads often cause unacceptable degradation to RF circuits. In this paper, ESD protection design considerations for RF circuits are addressed, and on-chip ESD protection strategies for both narrow band and broadband CMOS RF circuits are also presented and discussed