Reliability Issues and Models of sub-90nm NAND Flash Memory Cells

The reliability issues, including 100k cycle's endurance and 2 hours high temperature storage (HTS: 150degC, 200degC and 250degC) of sub-90nm NAND flash cells, are studied. Furthermore, the trap generation models in endurance and interface trap recovery model in HTS are proposed. Endurance characteristics show that the interface trap and bulk trap generation have a power-dependence on program/erase cycle count (DeltaN_it, DeltaN_ot infin cycleuarrm). The exponent of interface trap generation both program and erase are 0.62; while in bulk trap generation, the exponent for the cycle count is 0.30, which is extracted only from the erased cells due to varying stored charges of programmed cells during tunnel oxide degradation. The HTS characteristics show that the interface trap recovery and electron-detrapping are the major mechanisms for sub-90nm NAND flash memory, while stress induced leakage current (SILC) is almost negligible. Thus, based on the reaction-diffusion (R-D) model and Arrhenius approximation, the simplified interface recovery model in HTS is proposed as: dN_it/N_it = -k₀ middot exp(-E_a/k_BT) middot dt