Polycrystalline Si optimization for 45nm node Ni-FUSI gate

In this paper, the authors report the impact of polycrystalline Si structure on the NMOS transistor performance with a HfSiON/Ni-FUSI (fully silicided) gate. For polycrystalline films, as deposited grain structure was predominantly columnar at heater temperatures 690-730degC, except in the presence of hydrogen where the grains assume a random microcrystalline structure. Amorphous film was achieved by lowering the heater temperature down to 610C. The impact of the deposition temperature and adding H₂ during the deposition on the poly-Si film structure and surface roughness is investigated. Ni-FUSI gate electrode was fabricated with these different structures. The resulting NMOS transistor performance is discussed