Development of strained Si-SiGe-on-insulator wafers for high speed ULSI

Strain relaxation process of SiGe-on-insulator (SGOI) structures in the oxidation induced Ge condensation method was investigated as a function of SiGe thickness. Complete relaxation was obtained for SiGe layer having the thickness of more than 60 nm, leading to the establishment of highly relaxed SGOI wafer fabrication. The photoluminescence evaluation of the strained Si/SGOI wafers showed high Ge fraction degrades crystallinity of St-Si/SGOI wafer, and high Ge condensation temperature is beneficial to the crystallinity enhancement. CMOS inverters and ring oscillators were fabricated to evaluate the impact of strained-Si/SGOI on the device performance. The signal propagation speed of the CMOS on the St-Si/SGOI wafer was twice as high as that of the Si-on-insulator CMOS