A Dead Time Compensation Method in Voltage-Fed PWM Inverter

A new dead time compensation method for a pulse width modulation (PWM) inverter is proposed. There are several causes to distort output voltage in the PWM inverter. One is caused by the dead time to avoid the shoot-through of the DC-link. Others originate from the nonlinear switching devices such as turn-on/off delay time and voltage drop. This distortion produces 5th and 7th harmonics in the current of the stationary reference frame, and 6th harmonics in the current of the synchronous rotating frame respectively. In this paper, the signal of the integrator output of the synchronous d-axis PI current regulator is chosen and processed to compensate for voltage distortion by the dead time and the nonlinearity of the switching devices because this output signal has the ripple corresponding to six times of the stator fundamental frequency. The proposed method can be easily implemented by compensating the output voltages of the d- and q-axis current regulator to reduce the voltage distortion. Therefore, the proposed method has the following features; the simple implementation without additional H/W, the robustness to the variation of the machine parameters, and application to not only the steady state but also the transient state because the integral output signal of the d-axis current regulator is used for compensating the dead time effect. The validity of the proposed compensation algorithm is shown through the several experiments