Distributed Current Mode Logic

This paper introduces a new high-speed CMOS logic family called distributed current mode logic (DCML). This architecture is a combination of existing current mode logic (CML) architecture and the concept of distributed circuits. Distributed current mode logic takes advantages of distributed circuit, and is able to work up to 80 GHz in 0.13 mum CMOS technology. Because of the low noise behavior of the current mode logic family, DCML generates low power/substrate noise. Differential implementation of this logic makes it more immune to the noise generated by other blocks. These properties make this architecture a good candidate for very high-speed data communication integrated circuits