Block-diagram-level design capture, functional simulation, and layout assembly of analog CMOS ICs

A new computer aided design tool to assist in the fast prototyping of analog CMOS ICs is presented. This CAD system uses a library of precharacterized functional cells. It allows creation of a design by selecting analog function blocks from a library and by interconnecting them in a block-diagram-level design capture and simulation page. The new analog circuit is then simulated at a behavorial level to evaluate circuit performance. The IC layout is assembled by a cell placement and routing program, using cell layouts from the cell library. Examples illustrate features of this CAD system.<>